Not applicable.
1. Field of the Invention
The present invention relates, in general, to the field of automatic test equipment, and more specifically to automatic component identification system for electronic board tester that identify the defective components on a failed tested board and to select the best test for testing the board.
2. Description of Prior Art
Many electronic devices come with a variety of interconnection sockets that allow them to be upgraded in capabilities or to add sub-assemblies that will provide additional functionality to the original configuration. For example, personal computers include standard expansion slots like ISA, EISA, and PCI, which allow the manufacturer to configure the system according to customer""s requests. After the sale, the expansion slots allow the customers to upgrade their computers by installing new expansion boards with a variety of functionality. In a similar manner, memory manufacturers established standard connections for SIMMs, DIMMs, SO DIMMs and others memory modules, so that computer manufacturers as well as the users are free to select memory modules from a variety of competing sources.
This benefit of using a standard connection was adapted by a large variety of electronic products in the computer industry as well as in telephony and other fields. Thus, in the computer field, many add-on boards from competing manufacturers, like video cards, voice cards, and modems will fit in the expansion slot, in the same way that memory modules with different configurations will fit in the memory expansion sockets.
Memory modules and expansion cards are produced in high volume and require efficient automated test equipment to insure their quality. Such automated test equipment includes a test socket, which is wired in accordance with the relevant connection standard of the tested device. The devices to be tested are manually placed by the operator in the test socket or an automatic device handler may do the feeding and the placement of the device in the test socket. After the test process, the good devices that pass the test are shipped out, while the failed devices are sent back for repair.
For memory modules, it is possible to manufacture a module of a given size and data width using several different components. Similarly, video cards with the same capabilities can be made using different components. And sometimes, the same manufacturer has to produce the devices with different components due to shortages or other market conditions. Therefore, if a tester connected to the device finds errors, the tester will mark the device as defective, but will not be able to properly identify the defective components, unless the operator of the tester manually selects the actual configuration.
When tested on an automatic tester, memory devices with different configurations but with the same electronic structure of size and data width will behave exactly the same functionally. Therefore, commercially available memory testers like the xe2x80x9cSIMCHECK IIxe2x80x9d use a variety of functional tests to identify the electronic structure of the module, and once an error is encountered, the tester provides an indication on which connection pin of the module the error was detected. A technician then needs to trace the connection pin to the actual defective chip to be repaired. To eliminate this time consuming task, memory testers have been adapted to store drawings of the tested module associated with connection lists. Before the test starts, the operator must select the device to be tested from a list of stored diagrams. When an error is detected, the diagram of the tested module appears on the screen and shows the defective device. Of course, this method is particularly susceptible to operator errors. When a variety of different modules are being tested interchangeably, operator errors in selecting the correct module drawing will clearly defeat the ability to identify the defective components correctly.
The correct and automatic identification of the tested device is also critical for the selection of the fasted and most reliable test algorithm and test parameters setup. For example, while two memory modules have the same size of 64Mxc3x9764, one can be made of 64Mxc3x978 chips and the other can be made of 64Mxc3x9716 chips. These modules can be better tested by two different test routines that are optimized to detect interference inside the individual chips. Therefore, it is clearly very important that the tester is able to identify which memory chips are used in order to select the best test routine.
A variety of automatic device handlers are known to the art of electronic board and device testing. Such a device handler accepts a quantity of boards or modules to be tested in an input tray and feeds them sequentially to the test socket site that is connected to the tester. Based on the test result of the tester, the tested boards are further conveyed to different containers, at least one is reserved for the failed boards. One of the problems associated with such automatic device handlers is that the proper marking of the exact defective components on the failed boards require an exact identification of the board.
With these problems in mind, the present invention seeks to provide an automatic component identification system for tester of electronic boards with a standard connector. Such system insures that errors encountered at the standard connector level are correctly attributed to the defective individual components that are causing the error. The automatic tester, which includes an interface to the tested device, a computer, and a display, is connected to two small cameras placed in front and behind the tested device. Images of both sides of the tested board are captured by the cameras and digitized for a transfer to the computer. The computer employs pattern recognition and visual processing techniques to analyze and to extract an outline diagram of the shapes of the components placed on both sides of the board. The computer compares the extracted outline diagram with a supplied and updated database of outline diagrams of known boards until a match is found. The stored outline diagram, which is matched to the currently tested module, is further linked to a connection list that maps all the individual components on the tested board to specific connections of the standard connector.
Errors found by the test equipment, which relates to specific connections of the standard connector, are matched by the connection to the defective components. The computer displays the extracted outline diagram with highlights placed on the defective components. It also prints a report showing the captured picture of the tested device with proper markings to indicate the defective components.
It is therefore an object of the present invention to automatically identify the outline diagram of the tested electronic board so that the actual defective components are explicitly identified.
It is a further object of the present invention to provide an automatic identification of the structure of a tested electronic board to select the most appropriate test algorithm and test parameters setup.
It is still a further object of the present invention to provide an exact marking of the defective components of electronic boards tested with an automatic device handler.